1. Technical Field
The present invention relates to a decoding apparatus which decodes a signal mixedly composed of a variable-length code and a fixed-length code, where the codes are utilized to transfer and record a digital image signal.
2. Background Art
Recently, a signal compression technique is widely used for transmitting and recording sound and image in the form of digital signal. For example, signal compression or data compression in a computer is carried out such that sizes for various files are made small by compressing data in the files. Thereby, communication time and telephone bills are reduced. In other words, cost incurred in storage and communication therefor is cut down to a certain degree. Since there is a huge amount of information necessary for a motion image, a highly efficient coding is indispensable for the digital transmission and memory. Typical techniques utilized in such a highly efficient coding in recent years are a orthogonal transform, run-length technique, a variable-length coding, a motion compensation and so on.
Particularly, the variable-length coding is widely in use since it can execute a reversible coding with a less amount of codes. In a coding standard for carrying out the transmission and record, it is often practiced that the variable-length codes and the fixed-length codes are mixed in a communication stream.
In a case where various types of coding methods are handled and the coding method has several modes, such a coding need be programmable. In the conventional practice, when a rate of the compressed codes is slow, decoding therefor is executed by a microprocessor where a program therefor is rather easy. Moreover, in a case where a software processing by the microprocessor is not sufficient, the decoding is carried out for each code word by utilizing a block for exclusive use with the decoding of the variable-length code, under control of the microprocessor.
FIG. 1 is a block diagram where the decoding is exclusively executed. FIG. 2 shows a operation procedure for the block shown in FIG. 1.
In the method shown in FIG. 1, variable-length-code decoder 301 serves as an accelerator for central processing unit 302. In central processing unit 302, the fixed-length codes are extracted, and a vector calculation is carried out for the motion compensation. Operation for this conventional technique is described below.
When variable-length-code decoder 301 is activated by an instruction from central processing unit 302, central processing unit 302 sends out a start signal 303 and a table selection signal to variable-length-code decoder 301 so that the fixed-length-code decoding is stopped (indicated with a in FIG. 2).
When the variable-length-code decoder 301 receives the start signal 303 from the central processing unit 302, the variable-length codes are decoded from a head of an input code based on the table selection signal (indicated as b in FIG. 2). When variable-length-code decoder 301 terminates a processing, end signal 304 and a code length which is decoded upon the variable-length code are sent to central processing unit 302 (indicated with c in FIG. 2). When central processing unit 302 receives end signal 304, central processing unit 302 forward the input code by the code length and resumes an instruction execution (indicated with d in FIG. 2).
In the above-mentioned technique, since variable-length-coded image data exist continuously in a code where the image signal and so on are compressed, the central processing unit 302 is stopped all the while the variable-length-coded image data exist. As a result thereof, data processing can not be completed within a desirable time period.
In a coding method which satisfies a current television broadcast standard and a high-definition television standard, an operational rate of decoder 301 and a pixel rate are almost same. For example, in a worst condition where pixel data as the variable-length code exist for as much as the number of pixel, the decoding can not be executed in a real time basis due to an overhead necessary for decoding the fixed-length code, calculating the motion vectors and for transferring the instructions to and from variable-length-code decoder 301.
There is also available a technique where variable-length-code decoder 301 executes a syntax interpretation and the decoding of the variable-length codes for a particular section in which the variable-length codes exist continuously. In this technique, there need be a plurality of circuits for the syntax interpretation when there are plural syntaxes such as a case where there are several different modes and various types of coding methods. Thereby, the number of variable-length-code decoders 301 are increased, so that there is caused a problem where an overall circuit scale is undesirably enlarged.
As described above, the decoding process is not performed in the real time basis and the size for the circuit is undesirably enlarged in the conventional decoding apparatus.